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Hello!
Is there a way to follow signals trough the design hierarchy with the ::quartus::rtl TCL package? I'd like to find out in a TCL script if a spezific toplevel pin is connected to anything in one of the lower design modules. The script should run after map, before the fitter. I've been trying to use the get_rtl_get_pins, _fanouts etc... commands but didn't succeed to follow the connection of a toplevel pin into a submodule. Regards, EgoLink Copied
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