force quartus to instantiate LPM_COUNTER from HDL

[Altera_Forum]

Dear All, 

is there any way how to force quartus to instantiate LPM_COUNTER when I describe counter in VHDL??  I have following structure:   process (CLK, RESETNA) is  begin -- process  if RESETNA = '0' then -- asynchronous reset (active low)  ItemCount <= (others => '0');  elsif CLK'event and CLK = '1' then -- rising clock edge  -- synchronous load:  if ItemCountClear = '1' then  -- load data  ItemCount <= (others => '0');  elsif ItemCountEnable = '1' then  ItemCount <= ItemCount - '1';  end if;  end if;   end process;  Whatever I do with this structure (using variables instead of signals, changing the position of ifs, increase instead of decrease etcetc), the result is always register + ADDER + BUNCH OF MULTIPLEXERS. Why that? What I want is either LPM_COUNTER, or series of registers + some glue logic. Is there any way how to force it?  thx d.

[Altera_Forum]

See the Quartus handbook chapter referenced at http://www.alteraforum.com/forum/showthread.php?p=3369#post3369. The Counters section I saw didn't have a complete example like what you're doing, but there might be something in that chapter that will help.

[Altera_Forum]

I have read this one. No valuable information concerning LPM_COUNTER is there.

[Altera_Forum]

That handbook chapter says, "Implementing counters in HDL code is easy; they are implemented with an adder followed by registers." 

 I suspect that Quartus integrated synthesis intentionally does not infer lpm_counter. It might be that the counters created by synthesis are just as good. If you specifically want lpm_counter, you will probably have to instantiate it yourself.

[Altera_Forum]

Hi Brad, 

thanks for response. The thing is, that I'm not really relying on using LPM counters, however one would expect that LPM implementation gives better results. In fact, it should because countup/down is just bunch of registers with very minimal amount of logic around. The one generated from VHDL code then needs more logic connections. When you write down function for shift register, it will correctly instantiate shift. As shift and counter are implemented in almost the same way, I do not see any reason why LPM counter should not be instantiated. I have found that here: http://www.altera.com.cn/support/examples/vhdl/vhd-counter-synch.html they claim that this inferres LPM_COUNTER. However when added into my project, it generates register + adder + multiplexer. so this behavior sounds to me rather like a bug.

[Altera_Forum]

--- Quote Start ---  ... one would expect that LPM implementation gives better results.  --- Quote End ---    That's not necessarily true.  The QII 7.2 project in counters_qii7.2.zip contains your RTL counter and instantiates the equivalent lpm_counter. Both counters are configured as 64 bits. The project uses the default Quartus settings for Analysis & Synthesis and the Fitter.  There is no difference in resource utilization. Each counter uses 65 logic cells including 64 registers.  There is only a tiny difference in performance, and that might be because of what the Fitter by chance chose to do differently for the two counters. The LPM version is only 0.114 ns faster than the RTL version in an EP3C5F256C6.     --- Quote Start ---  I have found that here: http://www.altera.com.cn/support/examples/vhdl/vhd-counter-synch.html they claim that this inferres LPM_COUNTER. However when added into my project, it generates register + adder + multiplexer. so this behavior sounds to me rather like a bug.  --- Quote End ---    The readme file on that page has this:    --- Quote Start ---  Software Tool Requirements ==========================  The Quartus II software version 4.0 or later, or the Mentor Graphics  Precision RTL Synthesis 2003, or Synplicity Synplify Pro 7.3.3.  --- Quote End ---    I compiled the same design with QII 4.0. (I changed to an older device so that I could use that version.) The results are in counters_qii4.0.zip. As you can see from the Analysis & Synthesis Resource Utilization by Entity and Fitter Resource Utilization by Entity tables in the report files, lpm_counter was inferred for the RTL counter.  Apparently Quartus integrated synthesis has been changed since version 4.0 not to infer lpm_counter because the results are just as good without lpm_counter.

[Altera_Forum]

Hi Brad, 

you're right. The difference is in different compilers. I've tried the same thing as you. Compiled in Q72 does not give LPM_COUNTER, Q40 gives. From what I saw I have concluded that it makes no sense to use LPM_COUNTER at all then, if you use Q72.  thanks for your time.  cheers .d.