i get this code and i was really needed to implement an speech recognition project using vhdl code...i have trained it and i want to upload in DE2 board but am getting this error so please help me out...if you know where i can get the full code u can help me with it...your help will be appreciated...thanks in advance.
library ieee, std, work;
use ieee.std_logic_1164.all, std.textio.all, work.all;
entity readspeech is
port (speech_length : out integer;
speech_read : out std_logic := '0');
end readspeech;
architecture only of readspeech is signal N : integer := 10000;
-- make sure this number matches the -- number of samples in your speech -- data file
type speechvector is array (1 to N) of real;
signal speech : speechvector ; begin
READDATA: process
file data_file : text IS IN "down.dat";
variable buf : line;
variable speech_length_t : integer := 0;
variable real_data : real;
begin
readline(data_file,buf); -- read comment line (ignore)
readline(data_file,buf); -- read line
read(buf,speech_length_t); -- number of data points
for i in 1 to speech_length_t loop
readline(data_file,buf); -- read a line
read(buf,real_data); -- get the data
speech(i) <= real_data; -- store to speech vector
end loop;
file_close(data_file);
speech_read <= '1';
speech_length <= speech_length_t;
wait;
end process;
end only;
.....
after i run the code am getting this message...and the problem i make it red and underline.
cannot synthisize non constant real objects or values
