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how to delete a part of the design using ECOs

Altera_Forum
Honored Contributor II
809 Views

Hi all, I have a circuit design containing 2 parts, the first part can run on it own, while the second part gets some input from the first part and gives some outputs. 

Is there any way that after compiling, I can use ECOs mode to delete the second part so that I can have two netlists, one with the second part and one without the second part? 

Because I want to use side-channel to evaluate what the difference caused by the second part only. 

I tried incremental design technique but it didn't give the result I expected. The routing and placement of the first part in 2 designs (one with the second part, one without the second part) are still somewhat slightly different. 

I want to keep it exactly the same. 

 

Thank you so much for reading. 

:)
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1 Reply
Altera_Forum
Honored Contributor II
92 Views

Hi, 

 

For ECO changes using Altera Quartus Chip planner & Resource property Editor refer the following link, 

https://www.youtube.com/watch?v=rnhn5n7os78 

 

Best Regards 

Vikas Jathar  

Intel Customer Support – Engineering 

(Under Contract to Intel)
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