how to implement two megafunctions by serial?

Altera_Forum · ‎03-23-2008

hi,

im trying to implement altfp_add_sub megafunction and altfp_mult megafuntion in a block design file. In the begining they look fine but when i finished the compilation part,i found only the adder inputs and outputs in the node finder tool. i couldnt found the mult I/O parts in the node finder.

And also when i finished the functional simulation netlist generation,i found this Warning: Using design file controller.v, which is not specified as a design file for the current project, but contains definitions for 15 design units and 15 entities in project.

https://www.alteraforum.com/forum/attachment.php?attachmentid=414 (the block design file)

is there any possibility to implement two megafunctions by serial?

thank you

Altera_Forum · ‎03-23-2008

It's surely possible to use two series connected Megafunctions in a bdf design. But I wonder, how you can use single bit input ports adda and addb for the input busses and a non-bus connector line for a bus signal?

Altera_Forum · ‎03-24-2008

i dont know how to promote the input and the outpus pins on the megafunction. i think i just compile only the megafunction of add_sub.:confused: how i will do it? i want to promote these two megafunctions in one block design file. or any? thank you for your interest

Altera_Forum · ‎03-24-2008

Just connect the in- and outputs. But you need bit vector ports with busses (e. g. adda[63..0]) and thick line bus connectors.

Altera_Forum · ‎03-24-2008

i found another solution;

module ust_module(clock,a,b,result,overflow,underflow);
input clock;
input  a,b;
output  result;
output overflow,underflow; 
wire  c;
wire  d;
mult2 carpici2(
	.aclr(),
	.clk_en(1'b1),
	.clock(clock),
	.dataa(d),
	.datab(64'h4000000000000000),
	.denormal(),
	.indefinite(),
	.nan(),
	.overflow(overflow),
	.result(result),
	.underflow(underflow),
	.zero());
mult carpici(
	.aclr(),
	.clk_en(1'b1),
	.clock(clock),
	.dataa(c),
	.datab(64'h4000000000000000),
	.denormal(),
	.indefinite(),
	.nan(),
	.overflow(),
	.result(d),
	.underflow(),
	.zero());
	
adder  toplayici(
	.aclr(),
	.clk_en(1'b1),
	.clock(clock),
	.dataa(a),
	.datab(b),
	.denormal(),
	.indefinite(),
	.nan(),
	.overflow(),
	.result(c),
	.underflow(),
	.zero()) ;
	
endmodule

it works also

but there is another problem happens, i want to connect the result to input b but i want to add a d-flipflop on the line. or an shiftreg but these ffs are using 8 bits but my output bus is 64 bits. i want to use a mux-demux but i couldnt find any demux megafunction in quartus. Are there any option to change the bit selection in dff or shiftreg, or any demux example that i can use?

Altera_Forum · ‎03-24-2008

I don't understand the problem. Megawizard created FF can have any width, also FF inferred from HDL code.