Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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how to use all the pll's to create clock

Altera_Forum
Honored Contributor II
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Hi, 

 

I want to use all the pll's to generate 42 output clocks. 

when i try to compile my project i get the error message " Error: Design requires 42 clock signal(s) of type Global Clock but device can contain only 16 clock signals of type Global Clock" 

 

how do i define the extra clocks so I will be able to use them as outputs? 

 

BTW I use ARRIA II GX device. 

 

thanks...
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