Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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how to write a clock constraint for an LVDS clock IO.

Altera_Forum
Honored Contributor II
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Hi, 

I want to write a clock constraint for a differential clock input. 

 

Best Regard,
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