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i using hdlcoder to convert adaptive filter to vhdl and vhdl testbench,but some part of them i don't understand
here
SIGNAL Product_mul_temp : signed(47 DOWNTO 0); -- sfix48_En33
SIGNAL Product_out1 : signed(31 DOWNTO 0); -- sfix32_En20
Product_out1 <= "01111111111111111111111111111111" WHEN ((Product_mul_temp(47) = '0') AND (Product_mul_temp(46 DOWNTO 44) /= "000")) OR ((Product_mul_temp(47) = '0') AND (Product_mul_temp(44 DOWNTO 13) = "01111111111111111111111111111111")) ELSE "10000000000000000000000000000000" WHEN (Product_mul_temp(47) = '1') AND (Product_mul_temp(46 DOWNTO 44) /= "111") ELSE
Product_mul_temp(44 DOWNTO 13) + ('0' & Product_mul_temp(12));
and here
SIGNAL Sum_add_cast : signed(32 DOWNTO 0); -- sfix33_En20
SIGNAL Sum_add_cast_1 : signed(32 DOWNTO 0);
Sum_add_cast <= resize(Product_out1, 33);
Sum_add_cast_1 <= resize(Coef1_out1 & '0' & '0' & '0' & '0', 33);
im a beginner,so that many function that i don't know ,thanks for help
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the top code looks like saturation logic around the add.
the second one is a multiply by 16.
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