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module Peak_detector ( in ,
peak, count_time, counter, data); input [23:0] data; input [13:0] in; input [31:0] counter; output reg [25:0] peak; output reg [31:0] count_time; parameter reg [3:0] daten = data [3:0]; parameter reg [19:0] threshold = data [23:4]; ------------------------------------------------------------------------------------------ Hi all the above snip-bit of verilog code has been given me some issues over the last couple of days. when ever i compile the code i get the error: --------------------------------------- Error (10734): Verilog HDL error at Peak_detector.v(13): data is not a constant ------------------------------------- Do you know any where i can solve this issue? thank youLink Copied
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Hey,
Value written on Right Hand side need to be some constant value while declaring parameter. It can not have value which can vary during RUN time. So, you should use following : wire [3:0] daten; wire [19:0] threshold; assign daten = data [3:0]; assign threshold = data [23:4]; Cheers, Bhaumik
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