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interrupts between processor and FPGA - cyclone v soc

OAlon
Beginner
‎12-10-2020 12:55 AM
1,018 Views

i want to exchange short interrupt driven messages between processors and between processors to the FPGA. 

how can I do it ? 

in xilinx zync ultra scale they have IPI mechanism (inter-processor interupt). is there any equivalent mechanism in cyclone v soc?

 

best regards,

ofer    

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EBERLAZARE_I_Intel
Employee
‎01-24-2021 11:33 AM
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Hi,

Unfortunately, we do not have a design example for Cyclone V SoC, but you may refer below design example of the interrupts that uses Arria 10 SoC:

https://rocketboards.org/foswiki/Documentation/FPGASoftIPToLinuxApplicationExample2

 

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