interrupts between processor and FPGA - cyclone v soc

[OAlon]

i want to exchange short interrupt driven messages between processors and between processors to the FPGA. 

how can I do it ? 

in xilinx zync ultra scale they have IPI mechanism (inter-processor interupt). is there any equivalent mechanism in cyclone v soc?

best regards,

ofer    

[EBERLAZARE_I_Intel]

Hi,

Unfortunately, we do not have a design example for Cyclone V SoC, but you may refer below design example of the interrupts that uses Arria 10 SoC:

https://rocketboards.org/foswiki/Documentation/FPGASoftIPToLinuxApplicationExample2