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hi i'm beginner to vhdl. i'm write a vhdl code to display characters on lcd using de2 board. it display different characters for different input from 000 to 111.
i'm already compile the code in quartus and there are no error. however when i download the program on de2 board the lcd was not display anything. where am i done wrong....please help me...tq library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity lcd is port ( w : in std_logic_vector( 2 downto 0); rs : out bit; rw : out bit; db : out bit_vector(7 downto 0); lcd_on :out bit; lcd_blon : out bit); end lcd; architecture main of lcd is signal output : std_logic_vector(2 downto 0); begin process(output) begin lcd_on<='1'; lcd_blon<='1'; output <= w; case output is when "000"=> rs<='1'; rw<='0'; db<=x"4E",x"4F",x"52",x"4D",x"41",x"4C"; when "001"=> rs<='1'; rw<='0'; db<=x"4C",x"45",x"56",x"45",x"4C",x"20",x"31"; when "010"=> rs<='1'; rw<='0'; db<=x"4C",x"45",x"56",x"45",x"4C",x"20",x"32"; when "011"=> rs<='1'; rw<='0'; db<=x"4D",x"4F",x"44",x"45",x"52",x"41",x"54",x"45"; when "100"=> rs<='1'; rw<='0'; db<=x"46",x"4C",x"4F",x"4F",x"44",x"20",x"5A",x"4F",x"4E",x"45"; when "101"=> rs<='1'; rw<='0'; db<=x"44",x"41",x"4E",x"47",x"45",x"52",x"20",x"5A",x"4F",x"4E",x"45"; when "110"=> rs<='1'; rw<='0'; db<=x"45",x"58",x"54",x"52",x"45",x"4D",x"45",x"4C",x"59",x"20",x"44",x"41",x"4E",x"47",x"45",x"52"; when "111"=> rs<='1'; rw<='0'; db<=x"4D",x"41",x"58",x"49",x"4D",x"55",x"4D",x"20",x"5A",x"4F",x"4E",x"45"; end case; end process; end main;Link Copied
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anyone have suggestion please...
thank you..- Mark as New
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You don't have any delay in your code. For example in this linedb<=x"4D",x"41",x"58",x"49",x"4D",x"55",x"4D",x"20 ",x"5A",x"4F",x"4E",x"45";
the synthesizer will just see that you assign all those values to db successively with no delay, and will just simplify it todb<=x"45";

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