led_driver

Altera_Forum · ‎02-23-2012

Can anyone help me determine that I have translated it all correct please?

original verilog:

module led_driver (iRSTN, iCLK, iDIG, iG_INT2, oLED);
input                       iRSTN;
input                       iCLK;
input              iDIG;
input                   iG_INT2;
output          oLED;
//=======================================================
//  REG/WIRE declarations
//=======================================================
wire                  select_data;
wire               signed_bit;
wire                  abs_select_high;
reg                    int2_d;
reg             int2_count;
reg                   int2_count_en;
//=======================================================
//  Structural coding
//=======================================================
assign select_data = iG_INT2 ? iDIG :  // +-2g resolution : 10-bit
                               (iDIG?(iDIG?iDIG:5'h10):(iDIG?5'hf:iDIG)); // +-g resolution : 9-bit                               
assign signed_bit = select_data;
assign abs_select_high = signed_bit ? ~select_data : select_data; // the negitive number here is the 2's complement - 1
assign oLED = int2_count ? ((abs_select_high == 3'h0) ? 8'h18 :
                                        (abs_select_high == 3'h1) ? (signed_bit?8'h8:8'h10) :
                                        (abs_select_high == 3'h2) ? (signed_bit?8'hc:8'h30) :
                                        (abs_select_high == 3'h3) ? (signed_bit?8'h4:8'h20) :
                                        (abs_select_high == 3'h4) ? (signed_bit?8'h6:8'h60) :
                                        (abs_select_high == 3'h5) ? (signed_bit?8'h2:8'h40) :
                                        (abs_select_high == 3'h6) ? (signed_bit?8'h3:8'hc0) :
                                                                         (signed_bit?8'h1:8'h80)):
                                        (int2_count ? 8'h0 : 8'hff); // Activity
always@(posedge iCLK or negedge iRSTN)
    if (!iRSTN)
  begin
    int2_count_en    <= 1'b0;    
    int2_count <= 24'h800000;
  end
    else
    begin
        int2_d <= {int2_d, iG_INT2};
        if (!int2_d && int2_d)
    begin
      int2_count_en    <= 1'b1;        
        int2_count <= 24'h0;
      end
      else if (int2_count)
          int2_count_en    <= 1'b0;     
    else
          int2_count <= int2_count + 1;
    end
endmodule

my vhdl:

---------------------------------------------------------------------------------
-- led_driver.vhd
-- sindredit@gmail.com 16 Feb 2012
-- 
---------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity led_driver is
    -- Port -----------------------------------------------------------------------
    -- Comes from other files or from the card
    port (
            iCLK    : in  STD_LOGIC; -- CLOCK_50
            iG_INT2 : in  STD_LOGIC; -- G_SENSOR_INT
            iRSTN   : in  STD_LOGIC; -- NOT RESET
            iDIG    : in  STD_LOGIC_VECTOR(7 downto 0); -- CONTROL SIGNAL
            oLED    : out  STD_LOGIC_VECTOR(7 downto 0) -- OUT LEDS
     );
end;
architecture struct of led_driver is
    -- SIGNALS
    SIGNAL select_data : STD_LOGIC_VECTOR(4 downto 0);
    SIGNAL signed_bit : STD_LOGIC;
    SIGNAL abs_select_high : STD_LOGIC_VECTOR(3 downto 0);
    SIGNAL int2_d : STD_LOGIC_VECTOR(1 downto 0);
    SIGNAL int2_count : STD_LOGIC_VECTOR(23 downto 0);
    SIGNAL int2_count_en : STD_LOGIC;
    
-- START
begin     
        
    -- Output logic
    --oLed <= signalsoLed;
    oLED(2) <= '1';
    
    -- Should we reset?
    process(iCLK, iRSTN) begin
      IF ((NOT(iRSTN)) = '1') THEN
            int2_count_en <= '0';
         int2_count <= "100000000000000000000000";
      ELSIF (iCLK'EVENT AND iCLK = '1') THEN
         int2_d <= (int2_d(0) & iG_INT2);
         
         IF (NOT(int2_d(1)) AND int2_d(0)) THEN
            int2_count_en <= '1';
            int2_count <= "000000000000000000000000";
         ELSIF ((int2_count(23)) = '1') THEN
            int2_count_en <= '0';
         ELSE
            int2_count <= int2_count + "000000000000000000000001";
         END IF;
      END IF;
    
    end process;
end struct;