Community
cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
New Contributor I
988 Views

malloc selects Flash address for DMA transfers in memtest.c instead of SRAM

Hi,

In the current design there is NIOSII, DMA, Flash & SRAM implemented targeted for Max 10 FPGA. Trying to perform the DMA transfer as per the reference memtest.c

I see the below code in question here. There is no data cache implemented on this device and hence this function will use the underlying malloc function. Currently this function is returning an address in the flash region (as its largely not used in this program) & DMA checks fail. Could you please let me know how can i make this function select an address in SRAM region instead of the flash region (as required by the DMA transfers) ?

 /* Get a couple buffers for the test */

 data_written = (void*)alt_uncached_malloc(0x1000);

 data_read = (void*)alt_uncached_malloc(0x1000);

0 Kudos
9 Replies
Highlighted
26 Views

Hi,

 

Currently I am reviewing the forum for any open questions and found this thread. I apologize that no one seems to answer this question that you posted. Since it has been a while you posted this question, I'm wondering if you have found the answer? If not, please let me know, I will try to assign/find someone to assist you. Thank you.

 

Regards,

Nooraini

 

0 Kudos
Highlighted
New Contributor I
26 Views

Hi Nooraini,

I am still waiting for a reply on this. Please re-assign so that i can get some suggestions.

 

Thanks,

Arvind

0 Kudos
Highlighted
Employee
26 Views

Hi,

Are you trying to use the SGDMA to transfer data to or from SDRAM ? here I've created the system with SGDMA with no errors. Can you explain more about what you are facing of errors with screen-shoots of your design?

0 Kudos
Highlighted
New Contributor I
26 Views

Hi,

I am not using the SGDMA or SDRAM. Using the normal DMA controller IP.

Please find attached the system built snapshot. It must contain NIOSII processor, DMA Controller, Onchip memory (SRAM), Onchip Flash IP (intended for Max10 FPGA platform).

Try to run the memtest.c with the DMA enabled in test with below define enabled in the test. Intention is to perform a DMA transfer in this system. Source address (data_written) and destination address (data_read) must be within the SRAM region.

#define DMA_NAME

0 Kudos
Highlighted
New Contributor I
26 Views

Hi,

As i said in the original post, the problem i am facing is that malloc in the memtest.c is going out of the SRAM region and the memory transfers fail.

Below is the line of C-code:

 ram_loc = (void*)alt_uncached_malloc (memory_size) ;

 memory_base = (int) &ram_loc ;

Fixed Location code (alternatively if i use fixed memory locations within the SRAM region the entire test completes the intended memory and DMA transfers):

memory_base = 0x21c700 ;

 memory_end = 0x21cf00 ;

I am also attaching the two logs one using the malloc code(that fails at address outside the SRAM region)

#    Memory Test Main Menu

#   a: Test RAM

# Testing RAM from 0x21FFD0 to 0x2203D0

# -Data bus test passed

# Break key hit

# Simulation stop requested.

 -Address bus test failed at address 0x220010# End time: 13:50:26 on Nov 13,2018, Elapsed time: 0:24:23

# Errors: 0, Warnings: 87

 

and also one with fixed address (all memory test and DMA transfers complete).

 

#    Memory Test Main Menu

#   a: Test RAM

# Testing RAM from 0x21C700 to 0x21CF00

# -Data bus test passed

# -Address bus test passed

# -Byte and half-word access test passed

# -Testing each bit in memory device. passed

# -Testing memory using DMA.

# Source Address:0x206818 Destination Address:0x206A20 

# DMA transfer Src2Mem Done starting At:0x21C700

# DMA transfer Mem2Dest Done starting At:0x21C700

# DMA transfer Src2Mem Done starting At:0x21C900

# DMA transfer Mem2Dest Done starting At:0x21C900

# DMA transfer Src2Mem Done starting At:0x21CB00

# DMA transfer Mem2Dest Done starting At:0x21CB00

# DMA transfer Src2Mem Done starting At:0x21CD00

# DMA transfer Mem2Dest Done starting At:0x21CD00

#  passed

# Memory at 0x21C700 Okay

I have just added more print statments in the C-code to get these messages in the transcript.

Also attaching the memory map as seen in the summary.html of the entire system that i am currently using for the simulation in modelsim.

Question:

*How to restrict the malloc function to use free locations (that are not used by the boot code and rest of the main C code) in the SRAM region only* Or is there any other alternatives?

0 Kudos
Highlighted
Employee
26 Views

Hello,

I've created a sample design (working on DE0_NANO_SoC) for the DMA including the following components(NIOS II processor, Two memories, DMA, Sys_ID and Jtag_UART)

The code show you how to set the channels, the data pointers start the transaction and to check the data receive success.

Attached is the full design files.

I hope this helps you and gets your satisfaction.

Regards.

Highlighted
New Contributor I
26 Views

Hello Embeded_Guy,

Well my question is related to below code:

//void* tx_data = (void*) 0x00030000; /* pointer to data to send */

//void* rx_buffer = (void*) 0x00040000; /* pointer to rx buffer this can the memory destination base+ user offset */

Instead of fixing the address in C code, is there any better alternative in C to allow the C compiler to pick the free address location based on the transfer size?

If i replace above code with:

void* tx_data  = (void*)alt_uncached_malloc (data_size);

void* rx_buffer = (void*)alt_uncached_malloc (data_size);

then both addresses are generated as below upon simulating the same system in modelsim (Log file attached):

# Testing RAM from 0x80024140 to 0x800251A0

 

How to control the generation of this address in C so that we don't have to provide fixed address in C code?

 

0 Kudos
Highlighted
Employee
26 Views

You Can add a variable address by mapping it based on the data size. But make sure you don't overlap the data.

Did you try the design provided with the modifications you are asking about?

 

0 Kudos
Highlighted
Employee
26 Views

Hi,

did you manage to dd a variable address by mapping it based on the data size. But make sure you don't overlap the data?

Please let me know if you need support.

Regards.

0 Kudos