need help please.. Urgent

[Altera_Forum]

I had to design a simple 4-bit calculator for my assignment. 

In the calculator, I had used shift register for the memory part. After I completed the entire circuit, everything works well and I can get the output(answer) using the simulation.  But when I try implement the circuit to the altera DE1 board, the board is not working. I had refer to my lecturer, he said that if the timing simulation is not same with the functional simulation. The circuit will not work.  After check through all the parts(adder, subtractor,multiplier.....) all is working well, which mean the functional simulation is same as the timing simulation. But only the shift register is different. there is a delay in the timing simulation.  I had attached the waveform of the shift register in the pdf file. The highlighted red box is the delay part. So can anyone help me out?? please teach me how to reduce the delay or adjust some timing issue.. so that I can get the output same as the functional simulation. Thank you. I appreciate it alot..^^

[Altera_Forum]

your output Q shows acceptable degree of bus skew. delay must be there in timing sim. with respect to clock(tCO of register at least). you dont expect timing and functional sim to be same in term of such delays

[Altera_Forum]

As long as the data settles down before the next clock edge and does not violate the setup/hold window of the next flip flop stage, you are OK.