Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)

partition clk

Altera_Forum
Colaborador honorário II
1.708 Visualizações

I try to compile big project using partitions.  

I generate 8 the same partitions using 8 different projects. After compilation I export partition in qxp files end inport it in my top project. Each partition has 3 global clk. In top project this clk goes from one PLL(attach picture for example). During top compilation, fitter says what not enough global clk buffer.  

Each partition take 3 global clk buffer, but they can use the same buffers for each clk. How I can generate partitions in this case?
0 Kudos
4 Respostas
Altera_Forum
Colaborador honorário II
1.004 Visualizações

3 x 8 = 24 which is > 16 which is what is found in most devices for global clocks (you don't say which device you are using). With separate partitions, clock resources can't be merged together (including clock buffers), even if they are identical. 

 

If you manually set up clock control blocks and global clocks using ALTCLKCTRL IP and the Global Signal assignment in the Assignment Editor, you may be able to make it work.
Altera_Forum
Colaborador honorário II
1.004 Visualizações

Hi, sstrel. Thank you for answer. 

Do i need insert ALTCLKCTRL IP in my partitions or in top project?
Altera_Forum
Colaborador honorário II
1.004 Visualizações

Your clock network should be set up in your top-level project, including the clock buffers.

Altera_Forum
Colaborador honorário II
1.004 Visualizações

yes, it helps. but it seems what quartus insert two global clk buffer. One from the top and another from partition.

Responder