Dear Sir,
I am facing a peculiar JTAG programming problem. We are servicing a board having MAX7256SRI-208 CPLD's. The original design has been done through schematic and it is working fine. Now we have coded the schematic in hdl with enhancements (with proper pin mapping) and trying to fuse the same in CPLD, but mysteriously , the program fails to fuse into the chip. The following are the steps in detail.
using Altera Quartus 7.2 programming software.
1. The design with schematic works fine and the *.pof programs with no issues.
2. The same design is coded in hdl and the fuse file created. For the first time, the programmer gives the error saying that blank device failed. I uncheck the blank device option and program. The programming is complete, but the logic behaves erratically.
3. Now I try to fuse the original program (schematic) to the board. But it gives me the following error :
JTAG id code specified in the jam file does not match any valid JTAG id code for the device.
4. I have tried with three other boards , but mysteriously, the device locks itself from being programmed again.
5. I have not enabled any security bit option.
IT is an emergency. Please give solution to the problem.
regards
gvk
