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Hi there,
I´m using the GPIO pin header of the DE2 - 115. I´m finished with the pin assignment, but there are several pins unused. But i don`t want to have them floated, so i want to define them. I already read, that it is possible to connect them via 0 ohm resistor to gnd or Vcc. But in that case, they used a standard routing file from altera. I cannot use this file, but i want to define the gpio pins completely, to avoid damaging the board and the connected module. Is it possible to: - find the unused pins automatically - define their states, but without using them in the project or is it necessary to include I/O pins in the project to assign the unused pins to a state? Perhaps there is an other way to assign unused pins? Thank you in advance. kind regardsLink Copied
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You have two options;
1. Define all pins used in a schematic as port in your top-level HDL file, and drive them with valid values. 2. Use the device option to "tri-state unused pins", or "enable weak pull-up on unused pins" Given that a design may not use all FPGA pins on a device, I generally use both options. Run the scripts associated with this DE0-nano design http://www.alteraforum.com/forum/showthread.php?t=45927 and you'll see an example of; 1. A top-level design file that includes all I/O pins used on the DE0-nano board 2. A constraints.tcl script that assigns all the pins on the top-level, and some default constraints (including the weak pull-ups on unused pins constraint). 3. A synthesis script synth.tcl that automates the build. This approach allows me to create a new project by copying the top-level HDL and synth.tcl script, making a few minor path adjustments for the new project, and then synthesize a new design. I never have to worry about whether I have forgotten to assign pins correctly. Cheers, Dave
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