Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Can I physically (pin FPGA) use ports operator, which is used as an ingredient? When I use the pin planner, I see ports only main entity. How to do it? Thanks.
--- Quote Start --- you can name pins the same as the ports on the top level entity. busses need to be connected by individual bits. --- Quote End --- So, the physical pins must be declared in the main entity?
Nonetheless, the pins can only connect to the top level. So if you want pins to connect to a lower level you have to create ports for it on all higher levels and then map it trough the levels. As Tricky said, the names do not need to match the pin name as you can assign them to pins using the pin planner.
