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problem with value 'X' in VHDL

Altera_Forum
Honored Contributor II
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Dear my best friends 

I used vhdl to calculate SVPWM algorithm. I used LPM library for divider. I'd already initial value for all of signal, but It still has "X" value. 

This is LPM library 

m0 : lpm_divide----------divide component GENERIC MAP (LPM_WIDTHN=>32, LPM_WIDTHD =>32, LPM_PIPELINE=>1,LPM_NREPRESENTATION =>"SIGNED", LPM_DREPRESENTATION =>"SIGNED") port map (numer=>A,denom=>B,clock=>clk_120n,quotient=>sat);  

 

these are initial value: 

signal TTA,TTB,T_sum : STD_LOGIC_VECTOR(31 downto 0):=(others =>'0'); signal A,B,sat : STD_LOGIC_VECTOR(31 downto 0):=(others =>'0'); signal T1,T2 : STD_LOGIC_VECTOR(15 downto 0):=(others =>'0'); signal TAA,TBB : STD_LOGIC_VECTOR(15 downto 0):=(others =>'0'); 

 

these are my code: 

if clk_120n'event and clk_120n='1' then CNT<=CNT+1; if CNT=x"00" then SECT <= not (Vref3(11) & Vref2(11) & Vref1(11) ); elsif CNT=x"01" then TX<=Vref1; TY<=-Vref2; TZ<=-Vref3; ELSIF CNT=x"02" THEN case SECT is when "011" => T1 <= -TZ; T2 <= TX; when "001" => T1 <= TZ; T2 <= TY; when others => T1 <= T1; T2 <= T2; end case; elsif CNT=x"03" then T_sum <=x"0000"& (T1+T2); if T_sum>= x"410" then --X"410" TTA <=T1*x"0410"; TTB <=T2*x"0410"; else TAA <=T1; TBB <=T2; end if; elsif CNT=x"04" then if T_sum>=x"410" then A <=TTA; B <=T_sum; end if; elsif CNT=x"05" then if T_sum>=x"410" then TAA <= sat(15 downto 0); end if; elsif CNT=x"06" then if T_sum>=x"410" then A <=TTB; B <=T_sum; end if; elsif CNT=x"07" then if T_sum>=x"410" then TBB <= sat (15 downto 0); end if; elsif CNT=x"08" then TAM <= x"410" -TAA -TBB; elsif CNT=x"09" then TAO <= '0' & TAM(15 downto 1); elsif CNT=x"0A" then TBO <= TAO + TAA; elsif CNT=x"0B" then TCO <= TBO + TBB; end if; end if;  

The value get "X" value is SAT (result of divider command). I attached the waveforms in this message. I spent a lot of time for it but I still had not found the error. 

Please could you help me? 

Thank you very much.
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Altera_Forum
Honored Contributor II
751 Views

 

--- Quote Start ---  

The code you have posted has nothing to do with mine. 

--- Quote End ---  

 

 

It's mean that, What is difference between: 

1. Use add, sub, multiply, divide command directly in code 

2. Use lpm library.
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Altera_Forum
Honored Contributor II
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The synthesisor will place add/dub/multiply for you, from the LPM library if you write things like 

 

c <= a + b; 

c <= a * b; 

 

etc. 

 

And it will probably do a better job at minimising the logic. 

 

The only area where you really have to be careful is dividers because you cannot control the internal pipelining very easily without using the lpm_divide megafunction.
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Altera_Forum
Honored Contributor II
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I think your professor just wants you to use structural description for now, instead of designing it using behavioural code (c<=a*b). Probably he just wants you to have a deeper understanding of how you should connect multipliers, dividers, adders, subtractors, etc. in your design, rather than just describing everything behaviourally. 

 

However, in the industry, it is always easier to do a behavioural description.
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