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How to find the overall value of a circuit's propagation delay.A circuit having multiple inputs and outputs?
I am using quartus 2 10.1 web edition.링크가 복사됨
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--- Quote Start --- How to find the overall value of a circuit's propagation delay.A circuit having multiple inputs and outputs? I am using quartus 2 10.1 web edition. --- Quote End --- Hi, the question is not easy to answer, because the delay depends on the placement and the routing. The delay could not be less than the delay of the input anf the output cell. Kind regards GPK
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With Timing Analyzer, I think you can get the worst propagation delay time.
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If you just want to find out what the propagation delay is from an input(s) to an output(s) (assuming combinatorial logic only), then in TimeQuest you can use the following command:
report_path -from <inputs> -to <outputs> If you want to actually constrain these paths, then use the set_max_delay and set_min_delay SDC constraints.