Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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qsys-generate does not create vcs simulation support directory

zener
New Contributor I
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I have created two IP files (signaltap) for two different devices: A5EC008BM16AE6S and 10CX220YF780E5G.

If I create the simulation files for 10CX220YF780E5G using qsys-generate  I get both a vcs and vcsmx directory for Synopsys, but for A5EC008BM16AE6S I only get get a vcsmx directory.

Why is this? As far as I know there's nothing in the IP file which specifies the target simulator. Why don't I get scripts for Synopsys vcs?


I have made a minimal sample consisting of the two IP files. If you copy these to /tmp and run the script qsys-generate-test.sh (or the commands therein) you will see (for Linux):

cd /tmp
bash ./qsys-generate-test.sh stp257_Agilex5_A5EC008BM16AE6S.ip 'Agilex 5' A5EC008BM16AE6S
vcsmx
rm -fr /tmp/delete-me
cd /tmp
bash ./qsys-generate-test.sh stp257_Cyclone10GX_10CX220YF780E5G.ip 'Cyclone 10 GX' 10CX220YF780E5G
vcs vcsmx

I have tested this with version 24.2.0 Build 40 06/27/2024 SC Pro Edition as well as 24.3.0 Build 212 11/18/2024 SC Pro Edition under Linux. The result is the same.
I had no such issues with Agilex 7, so to me this appear to be a problem with Cyclone 5?

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RichardTanSY_Altera
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Beginning with Quartus Prime software version 24.2, the VCS 2-step flow is not supported for Agilex™ 5 devices. Agilex™ 5 devices support VCS only using the VCS MX 3-step flow.

Reference: https://www.intel.com/content/www/us/en/docs/programmable/683870/24-3/vcs-simulation-setup-script-example.html


Please checkout this KDB below:

https://www.intel.com/content/www/us/en/support/programmable/articles/000098428.html


Regards,

Richard Tan


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zutalors
New Contributor I
802 Views

Thank you Richard,

Is vcs supported if using a three step compilation and Verilog/SystemVerilog IP or is a Synopsys MX license required due to some Altera IP being provided in VHDL only?

Will this transition also will be applied to Agilex7 in the near future?

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RichardTanSY_Altera
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Yes, Agilex 5 devices support VCS, but only using the VCS MX 3-step flow.

Since this involves third-party tools, I recommend consulting with Synopsys directly regarding licensing inquiries.


Will this transition also apply to Agilex 7 in the near future?

-As far as I know, there are currently no plans to implement this for Agilex 7 devices.


Regards,

Richard Tan


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RichardTanSY_Altera
737 Views

Hi,


Do you need any further assistance from my side?


Regards,

Richard Tan


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zutalors
New Contributor I
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RichardTanSY_Altera
562 Views

Thank you for the reply. With that, I believe your inquiry has been answered. 


Now, I will transitioning this thread to community support. If you have any further questions or concerns, please don't hesitate to reach out. Please login to https://supporttickets.intel.com/s/?language=en_US , view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support.

The community users will be able to help you on your follow-up questions.


Thank you and have a great day!


Best Regards,

Richard Tan



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