Intel® Quartus® Prime Software
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"Cant place node <name> -- illegal location assignment INCONSISTENCY"

Altera_Forum
Honored Contributor II
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The fitter produces the error below, which I have no clue how to analyze. 

 

Error (171016): Can't place node "pio2:u0|pio2_hps_0:hps_0|pio2_hps_0_hps_io:hps_io|pio2_hps_0_hps_io_border:border|emac1_inst" -- illegal location assignment INCONSISTENCY File: .../synthesis/submodules/pio2_hps_0_hps_io_border.sv Line: 123 Info (11798): Fitter preparation operations ending: elapsed time is 00:00:00 Warning (171167): Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information. Error (11802): Can't fit design in device  

I've created a simple 2 GPIO Qsys design reading switches and driving leds on a DE1-SoC board, using a .qsf generated with DE1-SoC System builder. 

The error also appears when switching devices, i.e. with ALL location assignments removed. 

Also I tried DE1-SOC.qsf downloaded from the TerASIC website. 

 

Actually, I managed to generate a bitfile once, and now the flow is broken again. 

 

Any suggestions? BTW I'm using Quartus 15.0
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Altera_Forum
Honored Contributor II
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You getting this error message because the Fitter could not place the specified node due to the specified illegal location assignment. This error can occur when you edit the .qsf manually, or when you make a location assignment, select a different target device for the current design, and select NO when you asked if you want to remove the location assignment. The location assignment is not supported for the new device. 

 

To avoid this, you can remove the location assignment from the specified node, or click Yes when you are asked if you want to remove location assignments when selecting a different device.
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Altera_Forum
Honored Contributor II
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I understand your suggestion, I read it in the help/manual. But please have a look to the mentioned name: 

"pio2:u0|pio2_hps_0:hps_0|pio2_hps_0_hps_io:hps_io|pio2_hps_0_hps_io_border:border|emac1_inst" 

The error also refers to a generated verilog file, at a line at which the emac instanciation is closed. 

 

I would expect to get some more specific message. BTW pio2 is the name of the Qsys module. 

 

 

--- Quote Start ---  

You getting this error message because the Fitter could not place the specified node due to the specified illegal location assignment. This error can occur when you edit the .qsf manually, or when you make a location assignment, select a different target device for the current design, and select NO when you asked if you want to remove the location assignment. The location assignment is not supported for the new device. 

 

To avoid this, you can remove the location assignment from the specified node, or click Yes when you are asked if you want to remove location assignments when selecting a different device. 

--- Quote End ---  

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