removed location assignments dialog

[Altera_Forum]

When I select a faster speed grade part (same pinout, family), I get a popup that recommends removal of the location (pin) assigments. Why would I need or want to do this? 

  Assuming I went ahead and selected remove, I believe there is a simple trick to get the location assignments back all in one step, but I forget how its done.

[Altera_Forum]

It could probably use some more smarts. I believe this dialogue box should only come up when the part is different, and is basically asking to remove the constraints since they will no longer be valid.  

 The constraints are stored in the ASCII file .qsf. If you've deleted the pins in the project and saved the project, then they've been removed from the .qsf and they are lost. If you still have a fit database, you could go to Assignments -> Back Annotate Assignments and choose Pin & Device(although this will put you back with the other speed grade). If you don't have a fit design, and don't have the .qsf, then they are gone. You can probably get them from the .pin file of the last compile, but it won't be in the syntax the .qsf uses.

[Altera_Forum]

So as long as I am just changing the speed grade, I should be able to keep the old location assignments without fear of some problem later?

[Altera_Forum]

A different speed grade is generally the same die binned out to a different speed, so there shouldn't be any problems. But it never hurts to compile for it if you're using different speed grades.

[Altera_Forum]

If you just want to see the timing difference, you can just run the Timing Analysis (saves a whole lot of time) instead of a total compile. The functionality should be the same, if timing is met.

[Altera_Forum]

Won't the fit be different depending on the speed grade? I thought the fitter took that into consideration when trying to meet its goals (speed, area, etc).

[Altera_Forum]

That's correct. But the timing analyzor would give the actual timing on the different speed grades, even if they're with the same synthesis, and place&route result. If the timing analysis tells you that the new speed grade already meet your timing requirement, you probably don't want to waste time to do a total compilation again. The programming file can be used across diferent speed grades. Of course, if the timings are not met, then you would want to do a complete timing-driven compilation again.