report levels of logic

[FPGAOLOG]

Can you add num_logic_levels parameter to get_timing_paths  command instead of  get_path_info?

Current solution Intel recommends require two step filtering, storing interim results and does not necessarily return all the paths that has the required number of logic levels.

[SyafieqS]

Hi Levent,

You can use get_path_info to display number of logic level. The suggestion given is more to complex filter logic level when certain condition is met for the every path. The template is for reference and purposely to give user flexibility to cusomized at their own application. Any specific reason why you want to add num_logic_levels parameter to get_timing_paths command instead of get_path_info?

[FPGAOLOG]

It requires two steps. First running the get_timing_paths command, storing the entire return, then navigating through each path using get_path_info command. Adding the logic level filter into get_timing_path would eliminate storing and researching using get_timing_paths. get_timing_paths command has already other similar filters like -less_than_slack so why not add another filter.

The more important reason (if I have not misunderstood the mechanism of get_timing_paths) is that the get_timing_paths command may not return the entire list based on the npath limitation. So some paths that have high logic level may not make it to the return result of get _timing_paths.

[SyafieqS]

Levent,

Noted on that. It would be great if there is any small toy design to indicate this issue. I can file enhancement for next Quartus release to implement parameter num_logic_levels parameter to get_timing_paths command instead of get_path_info

[FPGAOLOG]

Thank you. I noticed that Quartus already have this implemented on QPro versions. It is only missing on Q Standard.