Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
17267 Discussions

run length encoding in vhdl

Altera_Forum
Honored Contributor II
‎04-27-2013 05:54 PM
2,503 Views

hai, 

how to implement run length encoding in vhdl..?:confused:
0 Kudos

Link Copied

3 Replies
Altera_Forum
Honored Contributor II
‎04-27-2013 09:08 PM
1,139 Views

Start off with a text editor.

0 Kudos
Copy link
Altera_Forum
Honored Contributor II
‎04-28-2013 04:42 AM
1,139 Views

i need run length encoding in matrix elements. each element is in 16 bits binary...

0 Kudos
Copy link
Altera_Forum
Honored Contributor II
‎04-28-2013 07:41 AM
1,139 Views

have you opened your text editor yet?

0 Kudos
Copy link
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.