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shared event nios II/f issue running from sdram - memory test passes

Altera_Forum
Honored Contributor II
1,878 Views

Hi, 

 

I am having an issue with Nios II/f and Nios II/s processors and SDRAM. I am running my own hardware as dual SDRAM chips as in IP perf user guide(Figure 2–3) with Two 64-MBit SDRAM Chips Each with 16-Bit Data making up a single 32bit wide bus. ( Similar to DE2-115 eval). 

My quartus project is a simple sdram project for the memtest with dual output pll at 50Mhz (one out phase shifted -120deg for sdram_clk). 

 

When attempting to debug the sdram it verifys ok but I receive the following error and the project never makes it to main.c: 

"Stopped due to shared library event" looping in the NiosII console. (see attachment).  

 

>Using Nios II/e processor code runs and debugs fine from all memory types (EPCS, onchip and sdram).  

>Using Nios II/e the Memorytest passes for sdram scan if program code is placed in EPCS, onchip or sdram. 

>Using Nios II/s/f the Memorytest passes for sdram scan if program code is placed in onchip-ram. (any code placed in sdram causes the error). 

>Using Nios II/s/f Running from sdram (as opposed to debug) or executing code from EPCS causes the system freeze and not execute code. 

>I have tried quartus ver 10.0sp1, 11.1sp2 and now 12.0sp1.. all do the same. 

>Tried different SDRAM timing and CAS 2 and 3. 

>Tried disable firewall. 

>Tried run as administrator. 

 

 

Please anyone ideas?  

 

I would think hardware but confused why the mem tests come up good..?
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Altera_Forum
Honored Contributor II
972 Views

From the error message I would guess this is a software error and not a hardware error. I do all of my Nios coding in assembly language and don't use the Altera software tools, so I'm not familiar with that environment. I suggest you run a debug trace and see where the error occurs.

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Altera_Forum
Honored Contributor II
972 Views

I finally seemed to have fixed the issue by further adjustment to the sdram clock phase and adjusting the sdram controller timing.. I guess the controller timing must have been on the fringe to cause the symptoms above.

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Altera_Forum
Honored Contributor II
972 Views

Hi I am having similar issues. 

 

Is there any chance you could give me more info or details as to what parameters where changed ans how you isolated then. 

 

Cheers
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