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syntax error at medias_2.vhd(31) near text "in"; expecting "(",

Altera_Forum
Honored Contributor II
‎03-02-2016 08:14 PM
2,229 Views

I've got this error in the following code, what's wrong in it? Thanks in advance. 

 

library IEEE; 

use IEEE.STD_LOGIC_1164.ALL; 

use IEEE.STD_LOGIC_signed.ALL; 

use IEEE.STD_LOGIC_arith.ALL; 

use ieee.numeric_std.all; 

use IEEE.STD_LOGIC_TEXTIO.ALL; 

use IEEE.STD_LOGIC_UNSIGNED.all; 

--package imagens is 

--type image_array is array(0 to 49, 0 to 49) of unsigned(7 downto 0); 

--type image_derivadas is array(0 to 49, 0 to 49) of unsigned (8 downto 0); 

--type image_19bits is array (0 to 49, 0 to 49) of unsigned (18 downto 0); 

--end package imagens; 

 

 

entity medias_2 is 

port(  

 

 

--divisor: in image_19bits; 

--dividendo: in image_derivadas; 

uk2: in image_19bits; 

vk2: in image_19bits; 

mediau2: out image_19bits; 

mediav2: out image_19bits 

 

 

); end medias_2; 

 

 

 

 

 

 

architecture behaviour of medias_1 is 

 

 

--FOR 

for x in 1 to 48 loop 

for y in 1 to 48 loop 

--mediami[j] = (mi(x-1,y-1)+mi(x-1,y)+mi(x-1,y+1)+mi(x,y-1)+mi(x,y)+mi(x,y+1)+mi(x+1,y-1)+mi(x+1,y)+mi(x+1,y+1))/9; 

 

 

--mediani[j] = (ni(x-1,y-1)+ni(x-1,y)+ni(x-1,y+1)+ni(x,y-1)+ni(x,y)+ni(x,y+1)+ni(x+1,y-1)+ni(x+1,y)+ni(x+1,y+1))/9; 

mediau2(x,y) <= (uk2(x-1,y-1)+uk2(x-1,y)+uk2(x-1,y+1)+uk2(x,y-1)+uk2(x,y)+uk2(x,y+1)+uk2(x+1,y-1)+uk2(x+1,y)+uk2(x+1,y+1))/9; 

mediav2(x,y) <= (vk2(x-1,y-1)+vk2(x-1,y)+vk2(x-1,y+1)+vk2(x,y-1)+vk2(x,y)+vk2(x,y+1)+vk2(x+1,y-1)+vk2(x+1,y)+vk2(x+1,y+1))/9; 

 

 

end loop; 

end loop; 

 

 

for x in 1 to 48 loop 

mediau2(0,y) <= (uk2(x-1,0)+uk2(x-1,1)+uk2(x,0)+uk2(x,1)+uk2(x+1,0)+uk2(x+1,1))/6; 

mediau2(49,y) <= (uk2(x-1,48)+uk2(x-1,49)+uk2(x,48)+uk2(x,49)+uk2(x+1,48)+uk2(x+1,49))/6; 

mediav2(0,y) <= (vk2(x-1,0)+vk2(x-1,1)+vk2(x,0)+vk2(x,1)+vk2(x+1,0)+vk2(x+1,1))/6; 

mediav2(49,y) <= (vk2(x-1,48)+vk2(x-1,49)+vk2(x,48)+vk2(x,49)+vk2(x+1,48)+vk2(x+1,49))/6; 

 

 

end loop; 

 

 

for y in 1 to 48 loop 

mediau2(0,y) <= (uk2(0,y-1)+uk2(0,y)+uk2(0,y+1)+uk2(1,y-1)+uk2(1,y)+uk2(1,y+1))/6; 

mediau2(49,y) <= (uk2(48,y-1)+uk2(48,y)+uk2(48,y+1)+uk2(49,y-1)+uk2(49,y)+uk2(49,y+1))/6; 

mediav2(0,y) <= (vk2(0,y-1)+vk2(0,y)+vk2(0,y+1)+vk2(1,y-1)+vk2(1,y)+vk2(1,y+1))/6; 

mediav2(49,y) <= (vk2(48,y-1)+vk2(48,y)+vk2(48,y+1)+vk2(49,y-1)+vk2(49,y)+vk2(49,y+1))/6; 

 

 

end loop; 

 

 

mediau2(0,0)<= (uk2(0,0)+uk2(0,1)+uk2(1,0)+uk2(1,1))/4; 

mediau2(0,49)<= (uk2(0,48)+uk2(0,49)+uk2(1,48)+uk2(1,49))/4; 

mediau2(49,0)<= (uk2(48,0)+uk2(48,1)+uk2(49,0)+uk2(49,1))/4; 

mediau2(49,49)<= (uk2(48,48)+uk2(48,49)+uk2(49,48)+uk2(49,49))/4; 

mediav2(0,0)<= (vk2(0,0)+vk2(0,1)+vk2(1,0)+vk2(1,1))/4; 

mediav2(0,49)<= (vk2(0,48)+vk2(0,49)+vk2(1,48)+vk2(1,49))/4; 

mediav2(49,0)<= (vk2(48,0)+vk2(48,1)+vk2(49,0)+vk2(49,1))/4; 

mediav2(49,49)<= (vk2(48,48)+vk2(48,49)+vk2(49,48)+vk2(49,49))/4; 

 

 

end process; 

end behaviour;
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Altera_Forum
Honored Contributor II
‎03-02-2016 10:05 PM
1,258 Views

Theres probably a ( missing near line 31. 

 

Also, your problem in your other post is probably because you included std_logic_arith - please delete this library.
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Altera_Forum
Honored Contributor II
‎03-22-2016 07:19 PM
1,258 Views

 

--- Quote Start ---  

Theres probably a ( missing near line 31. 

 

Also, your problem in your other post is probably because you included std_logic_arith - please delete this library. 

--- Quote End ---  

 

 

 

But where in line 31 i put this "("? 

 

I've also tried to delete std_logic_arith that was defined in other part of the code, still don't work.
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Altera_Forum
Honored Contributor II
‎03-22-2016 07:25 PM
1,258 Views

I dont know, as line 31 in the code you posted is a blank line. 

This is a pretty simple error to find and fix yourself. Just get a decent text editor - they all do bracket matching to ensure each ( has a corresponding ) 

And again - I cant see your real code, so no idea whether removing std_logic_arith is going to help (but you shouldnt use it anyway)
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Altera_Forum
Honored Contributor II
‎03-23-2016 06:47 PM
1,258 Views

 

--- Quote Start ---  

I dont know, as line 31 in the code you posted is a blank line. 

This is a pretty simple error to find and fix yourself. Just get a decent text editor - they all do bracket matching to ensure each ( has a corresponding ) 

And again - I cant see your real code, so no idea whether removing std_logic_arith is going to help (but you shouldnt use it anyway) 

--- Quote End ---  

 

 

 

Line 31 is the one where "for x in 1 to 48" appears for the first time.
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Altera_Forum
Honored Contributor II
‎03-23-2016 07:57 PM
1,258 Views

Instead of posting fairly useless information, why not post the real code? 

Or even better - fix this syntax error yourself. You know what the error is - theres a bracket missing. Why not try looking in the lines above?
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Altera_Forum
Honored Contributor II
‎03-23-2016 08:10 PM
1,258 Views

 

--- Quote Start ---  

Instead of posting fairly useless information, why not post the real code? 

Or even better - fix this syntax error yourself. You know what the error is - theres a bracket missing. Why not try looking in the lines above? 

--- Quote End ---  

 

 

 

It's because i don't know how to fix it. It doensn't make sense for me a bracket missing anywhere.
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Altera_Forum
Honored Contributor II
‎03-23-2016 08:34 PM
1,258 Views

Without the code - I dont know what you expect us to do..

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Altera_Forum
Honored Contributor II
‎03-23-2016 09:38 PM
1,258 Views

 

--- Quote Start ---  

Without the code - I dont know what you expect us to do.. 

--- Quote End ---  

 

 

 

the code goes as follows: 

 

1- library IEEE; 

2- use IEEE.STD_LOGIC_1164.ALL; 

3- use IEEE.STD_LOGIC_signed.ALL; 

4- --use IEEE.STD_LOGIC_arith.ALL; 

5- use ieee.numeric_std.all; 

6- use IEEE.STD_LOGIC_TEXTIO.ALL; 

7- use IEEE.STD_LOGIC_UNSIGNED.all; 

8- --package imagens is 

9- --type image_array is array(0 to 49, 0 to 49) of unsigned(7 downto 0); 

10- --type image_derivadas is array(0 to 49, 0 to 49) of unsigned (8 downto 0); 

11- --type image_19bits is array (0 to 49, 0 to 49) of unsigned (18 downto 0); 

12- --end package imagens; 

13- 

14- entity medias_2 is 

15- port(  

16- 

17- --divisor: in image_19bits; 

18- --dividendo: in image_derivadas; 

19- uk2: in image_19bits; 

20- vk2: in image_19bits; 

21- mediau2: out image_19bits; 

22- mediav2: out image_19bits 

23- 

24- ); end medias_2; 

25- 

26- 

27- 

28- architecture behaviour of medias_1 is 

29- 

30- --FOR 

31- for x in 1 to 48 loop 

32- for y in 1 to 48 loop 

33- --mediami[j] = (mi(x-1,y-1)+mi(x-1,y)+mi(x-1,y+1)+mi(x,y-1)+mi(x,y)+mi(x,y+1)+mi(x+1,y-1)+mi(x+1,y)+mi(x+1,y+1))/9; 

34- 

35- --mediani[j] = (ni(x-1,y-1)+ni(x-1,y)+ni(x-1,y+1)+ni(x,y-1)+ni(x,y)+ni(x,y+1)+ni(x+1,y-1)+ni(x+1,y)+ni(x+1,y+1))/9; 

36- mediau2(x,y) <= (uk2(x-1,y-1)+uk2(x-1,y)+uk2(x-1,y+1)+uk2(x,y-1)+uk2(x,y)+uk2(x,y+1)+uk2(x+1,y-1)+uk2(x+1,y)+uk2(x+1,y+1))/9; 

37- mediav2(x,y) <= (vk2(x-1,y-1)+vk2(x-1,y)+vk2(x-1,y+1)+vk2(x,y-1)+vk2(x,y)+vk2(x,y+1)+vk2(x+1,y-1)+vk2(x+1,y)+vk2(x+1,y+1))/9; 

38- 

39- end loop; 

40- end loop; 

41- 

42- for x in 1 to 48 loop 

43- mediau2(0,y) <= (uk2(x-1,0)+uk2(x-1,1)+uk2(x,0)+uk2(x,1)+uk2(x+1,0)+uk2(x+1,1))/6; 

44- mediau2(49,y) <= (uk2(x-1,48)+uk2(x-1,49)+uk2(x,48)+uk2(x,49)+uk2(x+1,48)+uk2(x+1,49))/6; 

45- mediav2(0,y) <= (vk2(x-1,0)+vk2(x-1,1)+vk2(x,0)+vk2(x,1)+vk2(x+1,0)+vk2(x+1,1))/6; 

46- mediav2(49,y) <= (vk2(x-1,48)+vk2(x-1,49)+vk2(x,48)+vk2(x,49)+vk2(x+1,48)+vk2(x+1,49))/6; 

47-  

48- end loop; 

49- 

50- for y in 1 to 48 loop 

51- mediau2(0,y) <= (uk2(0,y-1)+uk2(0,y)+uk2(0,y+1)+uk2(1,y-1)+uk2(1,y)+uk2(1,y+1))/6; 

52- mediau2(49,y) <= (uk2(48,y-1)+uk2(48,y)+uk2(48,y+1)+uk2(49,y-1)+uk2(49,y)+uk2(49,y+1))/6; 

53- mediav2(0,y) <= (vk2(0,y-1)+vk2(0,y)+vk2(0,y+1)+vk2(1,y-1)+vk2(1,y)+vk2(1,y+1))/6; 

54- mediav2(49,y) <= (vk2(48,y-1)+vk2(48,y)+vk2(48,y+1)+vk2(49,y-1)+vk2(49,y)+vk2(49,y+1))/6; 

55- 

56- end loop; 

57- 

58- mediau2(0,0)<= (uk2(0,0)+uk2(0,1)+uk2(1,0)+uk2(1,1))/4; 

59- mediau2(0,49)<= (uk2(0,48)+uk2(0,49)+uk2(1,48)+uk2(1,49))/4; 

60- mediau2(49,0)<= (uk2(48,0)+uk2(48,1)+uk2(49,0)+uk2(49,1))/4; 

61- mediau2(49,49)<= (uk2(48,48)+uk2(48,49)+uk2(49,48)+uk2(49,49))/4; 

62- mediav2(0,0)<= (vk2(0,0)+vk2(0,1)+vk2(1,0)+vk2(1,1))/4; 

63- mediav2(0,49)<= (vk2(0,48)+vk2(0,49)+vk2(1,48)+vk2(1,49))/4; 

64- mediav2(49,0)<= (vk2(48,0)+vk2(48,1)+vk2(49,0)+vk2(49,1))/4; 

65- mediav2(49,49)<= (vk2(48,48)+vk2(48,49)+vk2(49,48)+vk2(49,49))/4; 

66- 

67- end process; 

68- end behaviour;
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Altera_Forum
Honored Contributor II
‎03-24-2016 08:05 AM
1,258 Views

This still cannot be the real code because there is too much missing to create the error you listed in the thread title.

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