system ID not found at target base address

[Altera_Forum]

Hi.  

I'm new about quartus & nios.. I use quartus II, NIOS II 10.0 & Window7 32 & de2-70 fpga board.   I have no problem until quartus pin assign, hdl compile&analysis&synthesis, programmer(.sof), nios c code build.. but I've got a serious problem like this : run -> run configurations -> "actual system id not found on target at base address" error, so i can't run software with fpga board..   I have no license quartus & nios tool, but i use NIOS II/e CPU so i have no time_limited.sof file. (because it's a free IP) therefore it's not a problem related to license..   Please see the captured pics, and let me know the solution about this... thank you in advance..   https://www.alteraforum.com/forum/attachment.php?attachmentid=2864   https://www.alteraforum.com/forum/attachment.php?attachmentid=2865   https://www.alteraforum.com/forum/attachment.php?attachmentid=2866

[Altera_Forum]

You need to either: 

 1) add a system ID component to your SOPC system  2) disable the system ID check (check both boxes in the "System ID Checks" area shown in your second screen shot)

[Altera_Forum]

--- Quote Start ---  You need to either:   1) add a system ID component to your SOPC system   2) disable the system ID check (check both boxes in the "System ID Checks" area shown in your second screen shot)  --- Quote End ---       thanks for your apply.   i did check the 2 options about system ID checks as you apply, but the attached image shows other problem..   please let me know other solution about this..     https://www.alteraforum.com/forum/attachment.php?attachmentid=2868

[Altera_Forum]

I have a similar problem in my nios system. Before adding a new component 

to SOPC builder nios ii work without any errors, but after adding my new component (programmed in vhdl) it gives me an error "system id mismatch" and is not connected.  I tried to connect it through refreshing the connection, but still have the same error.  Your help to fix this error would be very much appreciated.  Thanx in advance...

[Altera_Forum]

Hello, 

I got exactly the same problems: The system works well with one custom SOPC module added to the system, but with an other one the system ID and time stamp cannot be read from the board (DE2-115 or DE3 => it's not caused by the board but by the software/HDL-design).  The custom SOPC module of course compiles correctly. But it is very large in size (2.500 lines of verilog code).  Is there maybe a practical limitation of logic size due to delay times? (I don't really belief that...) And why does the nios processor not respond anymore, even if the module isn't working correctly?  => How can a faulty memory mapped slave module affect the processor? The mm-interface itself cannot be wrong because it is simulated, recognised correctly by the SOPC builder and used by me in some other working designs "copy-and-paste".  Maybe someone can give me a hint where to search further?  Thanks a lot in advance...

[Altera_Forum]

Hi friends, 

I have the same problem here, I also did check the boxes for ignore ID check, and ignore the timestamp check, but it didn't work for me. Please help me out.  Thanks a lot.

[Altera_Forum]

I found the problem, and fixed it. The tutorial comes with the DE-70 board kit is not correct, the tutorial is old version for DE2-60 board. So as long as I followed the tutorial I will get wrong result and problem. I had to read and change the name of variable to pin name correspondingly.

[Altera_Forum]

我也有这个问题 我添加了system id 可是system id 显示为0 这个是不是意味着我要自编写一个 system id

[Altera_Forum]

--- Quote Start ---  thanks for your apply.   i did check the 2 options about system ID checks as you apply, but the attached image shows other problem..   please let me know other solution about this..     https://www.alteraforum.com/forum/attachment.php?attachmentid=2868   --- Quote End ---    i want to known that when you add the system id component ,does the system id show zero

[Altera_Forum]

no, the system ID is a random number that is changed each time the SOPC system is regenerated.

[Altera_Forum]

Check you pin name and pin assignment

[Altera_Forum]

after checking pin assignment ??????

[Altera_Forum]

Which target are you using ? DE2-70 or what? The tutorial comes with the package is not correct, you have to check the pin name and pin assignment if you are working on tutorial

[Altera_Forum]

I've the same problem with my DE4-230 board...I don't understand what is the problem.... 

 Has Anyone solved that...???

[Altera_Forum]

I've solved...I re-programmed the fpga with the .sof file and then I did the nios running procedure again...problem has gone....;)