Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
16604 Discussions

system verilog

Altera_Forum
Honored Contributor II
‎10-19-2017 12:21 AM
1,000 Views

How to write constraints for xor gate

0 Kudos

Link Copied

1 Reply
Altera_Forum
Honored Contributor II
‎10-19-2017 05:35 AM
283 Views

You use a keyboard.

0 Kudos
Copy link
Reply

Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.