Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
17268 Discussions

the conflict between signaltap and time limited .sof file

Altera_Forum
Honored Contributor II
‎08-23-2010 02:11 PM
1,259 Views

Hi, 

I was using a 8b10b IPCore to test a project, I have not a license, so I have to use timelimited .sof file for study. But I have accounted a serious problem. When I download the .sof file into the DE2 board, the timelimited word balloon was on the toppest of my PC screen, and I can't use the signaltap. I have tried several methods, I could click the button of run in signaltap, but it didnot response me at all. 

I wil appreciate your help very much, thanks!
0 Kudos

Link Copied

3 Replies
Altera_Forum
Honored Contributor II
‎08-23-2010 02:59 PM
553 Views

open a stand alone quartus programmer to program the sof

0 Kudos
Copy link
Altera_Forum
Honored Contributor II
‎08-24-2010 02:15 AM
553 Views

Another option is to configure the FPGA from the NIOS II command shell using the nios2-configure-sof command.

0 Kudos
Copy link
Altera_Forum
Honored Contributor II
‎08-24-2010 06:12 AM
553 Views

the problem has been solved, thanks very much!

0 Kudos
Copy link
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.