used array to create a memory

[Altera_Forum]

because ALTERA IP scfifo time sequence a litter different from my requirment , so i had to write a FIFO myself. 

 reg [DATA_WIDTH - 1 : 0] MEM [0 : DEPTH - 1]; // 16*8 ram  i use M4K like this ,is it allright?can it work stable and robust?

[Altera_Forum]

Hi AllenFPGA, 

 depending on the resources on your FPGA, Quartus can synthesize the use of ram blocks like M4K for such array definitions. You can check this in the summary report as well as in RTL viewer in Quartus.