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hello ;
I have to load my design into a cart that contains 2 FPGA stratix IV so i will use the Analysis and Synthesis tool and generate the verilog quartus mapping file (VQM) that will be divided with a partitioning tool into two parts to be probably the inputs of the fitter tool of the two FPGA's. For more clarifications let's see the flow in the attachement. So my question is :Could I use the vqm file as an input of the fitter tool? if it is possible could you tell me how can i do it? I use the GUI and the Tcl commands to configurate my design. Thank you for your help and if you need any information don't hesitate to ask me.Link Copied
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i haven't seen this type of flow before. i think you'll need to create two separate projects yourself
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--- Quote Start --- So my question is :Could I use the vqm file as an input of the fitter tool? if it is possible could you tell me how can i do it? --- Quote End --- I would not recommend using the tool to do the partitioning for you, even if it supports the flow. The timing of I/O cells is significantly different than the internal logic. If the design fit entirely within a single FPGA, then your timing constraint would simply be a clock frequency. When partitioning between FPGAs, you need to constrain the outputs and the inputs. You'll have much finer control over this if you partition the design yourself. Cheers, Dave
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Thank you for your advice .but i think creating a multi FPGA cart is done to be able to load a huge design into FPGA .
Have you any idea about the configuaration of multiFPGA cart?- Mark as New
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--- Quote Start --- Have you any idea about the configuaration of multiFPGA card? --- Quote End --- Yes, I have plenty of experience on configuring a multi-FPGA card. For example, this one has 4 reconfigurable http://www.ovro.caltech.edu/~dwh/carma_board/ other cards I use have 10 FPGAs. Follow my advice - treat each as a separate FPGA. Cheers, Dave
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hello thank you for your advice.

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