Problem using signal tap II to record output data.

[Altera_Forum]

Hi, 

 I've written a function to convert and analog signal which is a measured voltage value from my hardware device into integer thus i used signal tap II to checkout the integer output. But when i add in the output integer node to signal tap II , my code cannot be compile and gave the error : Selected device has 105 RAM location of type M4K. However recent design need more than 105 to successfully fit.   Any suggestion how to solve this problem? Or any other method to record my output data beside using signal tap II?

[Altera_Forum]

You need to free up more memory for use in signaltap. Signaltap uses the internal memory of the FPGA to store its data. If you are using all the memory blocks of your fpga within your design then you will not have any left for signaltap to use.  

 You have 4 options  1) Get a bigger FPGA (probably not an option)  2) Probe less signals or reduce the sample depth   3) Switch off parts of your code which you don't need just now that use memory blocks so you can temporarily do your signal tapping.  4) You could maybe force your design to use registers instead of memory blocks if you have spare register capacity   C