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Honored Contributor I
995 Views

waveform simulation problem

i already installation quartus 2, 7.2 full version . when i use it, i got a strange problem makes me crazy. the problem is 

suppose i use quartus to implement multiplier which i write VHDL codes, as following  

------------------------------------------------------------------ 

library ieee; 

use ieee.std_logic_1164.all; 

use ieee.std_logic_signed.all; 

use ieee.std_logic_arith.all; 

 

------------------------------------------------------ 

entity multipler1 is 

generic ( 

N : natural := 8; -- output signal width 

W : natural := 8 -- coefficients width 

); 

port( x : in std_logic_vector(N-1 downto 0); 

c : in std_logic_vector(N-1 downto 0); 

y : out std_logic_vector(N+W-1 downto 0) 

); 

end multipler1; 

---------------------------------------------------- 

architecture behavior of multipler1 is 

begin 

y <= x * c; 

end behavior; 

--------------------------------------------------- 

then the analysis and synthesis is successful  

next, i try to simulate the output waveform. 

i get problem here. i use the nodes finder to insert the nodes 

the all pins are appearing on node finder. i click ok  

there is warning shown: 

Warning: Creation of Node or Bus "c[0]" failed. Duplicated nodes are not inserted. Node or bus name "c[0]" already exists. 

 

i really need yours help, i donnot know that is because of software problem or anything else . 

 

thank you a lot
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2 Replies
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Honored Contributor I
24 Views

When you're inserting the nodes, do you insert both C and C[0], C[1], C[x]. If you're, then probably you will get these warning messages. C[0], C[X] are duplicated because you have already inserted the whole array C. 

 

Insert C or C[0], C[1], C[x] but not both of them. Hope it solves your problems.
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Honored Contributor I
24 Views

thank you very much, my ploblem is solved as your guide.

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