Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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what could be the possible reason?


Hello there,

I built a NiosII processor system on FPGA. For some research purpose, I built an own component which can monitor memory access. This component count memory accesses made by the processor to DDR3 memory and does some other things as well. So overall my system consumes almost all available logic elements in the FPGA I use. For a small number of memory accesses (let’s say maximum around 2000) my component could count the memory accesses correctly and works correctly. So I am sure there is no any logic error in my component. But for a large number of memory accesses, even the programs run smoothly without any struck, the memory count is wrong so I could

not be sure about the rest of the things are correct for a large number of memory accesses.

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