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Hi,
We want to prototype an open source RISC-V core running Linux in the Agilex 7 F-series development kit (DK-DEV-AGF014EA).
The board has an SD/MMC socket which we want to use to provide the Linux image, but it is connected to the SD/MMC Controller in the HPS. However, we do not want to use the HPS as a core, but the RISC-V core in the FPGA.
We have seen it is possible to route the SD/MMC controller in the FPGA, but if we understand correctly this is not allowing what we want, this is allowing to connect the SD Controller to another SD socket that could exist in other pins (not our case).
What would be the best way to connect the SD socket to the core in the FPGA? We can think of two options, but are not 100% sure of any:
- Option A: instantiate the HPS with SD/MMC controller in the design and connect to the core in the FPGA via AXI (HPS as slave). Then the core in the FPGA can request the data from SD via AXI, and the HPS should handle the SD/MMC in software.
- Option B: instantiate the HPS with SD/MMC controller and DMA in the design. The HPS would configure the DMA to transfer the data to the DDR, and by the time the core in the FPGA wants to use this data, it is already there (and if not wait).
Is there a reference design we can use as starting point?
Thanks!
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Hi,
Nios® V core don't support MMU and MPU. Which are needed for Linux OS.
We do have plan for this support but this will be in next year end.
Right now Nios® V, you can use the freeRTOS, MicroC/OS-II RTOS. You can refer the below link for Nios® V Processor Software Developer Handbook.
Regards
Tiwari
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Hi, thanks for the response.
We are not using NIOS, it is another RISCV core that has MMU.
The problem is connecting the SD card to this core in the FPGA.
Regards
Angela
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Hi,
Then, I think both options are feasible.
But, Option B is easy comparable to Option A.
Regards
Tiwari
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Thanks,
Is there a reference design we can use as starting point?
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Hi,
you can refer the below link to start with design. But this design doesn't fulfill your complete requirement but this is having HPS, DMA etc.
https://www.rocketboards.org/foswiki/Projects/SettingUpAndUsingBridgesOnAgilex
Regards
Tiwari
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As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

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