Agilex 7 M-series GSRD wrong DDR5 memory size

[ihsan28]

Hi,

I followed the development of GSRD for Agilex 7 M-series, like in https://altera-fpga.github.io/rel-25.1/embedded-designs/agilex-7/m-series/hbm2e/ug-gsrd-agx7m-hbm2e/

When I boot, I get 

init_mem_cal: Initial DDR calibration IO96B_0 succeed
DDR: Calibration success
io96b_mb_init: num_instance 1
io96b_mb_init: get memory interface IO96B 0
io96b_mb_init: IO96B 0 mem_interface 0: ip_type_ret: 0x1
io96b_mb_init: IO96B 0 mem_interface 0: instance_id_ret: 0x0
io96b_mb_init: IO96B 0: num_mem_interface: 0x1
DDR: Warning: DRAM size from device tree (2048 MiB)
mismatch with hardware (4096 MiB).
DDR5: 2048 MiB
ecc_enable_status: ECC enable status: 0
DDR5: size check success
DDR5: firewall init success
DDR5 init success

So I am thinking of changing the size of DRAM in the device tree, but I cannot find out where I should change it. Could anyone help me find out?
Thank you.

[alifzakuan_altera]

Hi ihsan28,

You can set your desired DRAM size in the device tree by modifying this line of code here - https://github.com/altera-fpga/u-boot-socfpga/blob/cd3a9044d66128bc67c4ce60eb752ac528620f54/arch/arm/dts/socfpga_agilex7m_socdk-u-boot.dtsi#L36

Currently, the default value was set to 2GB - 0x80000000

reg = <0 0x00000000 0 0x80000000>;

You can set it to 4GB by changing the value to 0x100000000.

Thanks,

Alif

[Jeet14]

Hi Ihsan.

Please let us know if there is any further query on this?

Regards

Tiwari

[Jeet14]

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