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Arria 10 DDR3 Emif calibration issues


Hi everyone,

In a new project we proposed to use Arria 10 10AX016E3F27I2SG FPGA.
As external memory we use the AS4C128M8D3B 1Gb DDR3 SSDRAM.
All our attempts to control the DDR3 correctly have been unsuccessful.
We started from the example provided for the Arria 10 SoC Development Kit in a reduced form.
Initially the DDR3 SDRAM didn't passed the calibration, while now it passes calibration but all internal calibration registers are 0xFF.
Please see attached the calibration reports as generated by Emif Toolkit.
We have also activated On-Chip Debug under Use Soft NIOS Processor. Please see attached log file Readme-NIOS.txt
Thank you in advance for any suggestions on solving the problem.

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2 Replies

Hi Adi,

I have checked and compiled the design at my side.

There are a few EMIF IP parameters that I have changed by following the memory datasheet.

  • Memory CAS latency setting to '11'
  • tRCD and tRP to '13.75'

Can you test with these changes?

Other than that, can you test with the EMIF example design that can be generated from the IP parameter?

The EMIF example design can run a test pattern that handle by the traffic generator.

We can check the test by monitoring the status signal of the traffic generator.

  • tg_0_traffic_gen_pass
  • tg_0_traffic_gen_fail

I can provide the EMIF example design if you need.

Please let me know if you need that help.



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