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SPI Agent to Avalon® Host Bridge - From intel FPGA support resource example design

vinupriya
Beginner
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The design example demonstrates how to use the SPI Agent to Avalon® Host Bridge to provide a connection between the host and the remote system for SPI transactions.

This design example is an updated version of Embedded Systems Development Kit, Cyclone® III Edition and is targeted to be used with Cyclone® V SoC development kit.

The .zip file contains all the necessary hardware and software files to reproduce this example. The readme.txt file includes instructions for running the design for cyclone III.

I have been trying this design example in Quartus version 13.0sp1 by updating the device to cyclone II.

https://www.intel.com/content/www/us/en/support/programmable/support-resources/design-examples/horizontal/exm-spi-bridge.html

I have been facing the following errors during compilation in cpu_spi_core.v file.

vinupriya_0-1686724774369.png

And these errors are from spi_bridge_system.v file.

vinupriya_1-1686725182063.png

 

It is showing like the above modules are not present. May I know where those files are present? 

 

 

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aikeu
Employee
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Hi vinupriya,


Based on your commen below, may I know you are working on a Cyclone II board or?

"I have been trying this design example in Quartus version 13.0sp1 by updating the device to cyclone II."


Thanks.

Regards,

Aik Eu


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aikeu
Employee
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Hi vinupriya,


May I know any follow up from the previous comment?


Thanks.

Regards,

Aik Eu


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aikeu
Employee
727 Views

Hi vinupriya,


I will close this thread if no further question.


Thanks.

Regards,

Aik Eu


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aikeu
Employee
690 Views

Hi vinupriya,


We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.


Thanks.

Regards,

Aik Eu


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