Unable to access FPGA_bridge_lwsoc2fpga_2M Address Map from Uboot

[binupr]

Hello there,

We are having issues accessing the FPGA LW address map from Uboot. This is for Intel Agilex SoC. Qsys has the LW bridge enabled. We are also enabling this bridge via CONFIG command in Uboot. Is there a specific setting in device tree or .dtsi file for enabling the light weight bus?

The issue is that when we tried to read or write from any address aligned space on 0XF9000000, Uboot hangs.

Any advice on this is much appreciated.

Thanks

Binu

[JingyangTeh_Altera]

Hi

In the uboot environment have you successfully loaded the FPGA configuration?

If yes, you could use the command "bridge enable" to enable the bridges before accessing over the bridge.

Regards

Jingyang, Teh

[binupr]

Hi,

Yes the FPGA configuration was successful. And yes we have enabled bridge using bridge enable command.

There has been some progress but that is only after adding lightweight bridge information in uboot device tree. But even with that we are not able to get correct information via ‘axi’ cmd for address space 0xf9000000

[JingyangTeh_Altera]

Hi

Yeah, the bridges will needed to be added into the device tree as well.

You could refer to our GSRD for the device tree example in the link below:

https://github.com/altera-opensource/u-boot-socfpga/tree/socfpga_v2023.04/arch/arm/dts

What is the axi command that you are referring too?

In uboot you could use the md tool to read through the bridge.

Regards

Jingyang, Teh

Regards

Jingyang, Teh

[binupr]

Hi,

Can you point from the above link which dtsi are you referring as there are bunch there for different processor target?

The axi command we are using is "axi md 32 0xf9000000"

Thanks

BPR

[binupr]

Hi Jingyang, Teh,

Any feedback on my above question?

Thanks

Binu

[binupr]

Hi Jingyang, Teh,

Following up on the above question.

Should we be using 'axi md' or 'md' command in uboot to access AXI light weight bridge?

Thanks

Binu

[JingyangTeh_Altera · Accepted solution]

Hi Binu

So sorry for the late response.

You could use the md command, no need the axi md.

For the example you could take a look at this dtsi.

https://github.com/altera-opensource/u-boot-socfpga/blob/a08598d99fe40f5214922d30da9af9ef7a43f2fd/arch/arm/dts/socfpga_soc64_u-boot.dtsi#L4

Regards

Jingyang, Teh

[JingyangTeh_Altera]

Hi

Any update on this case?

Is the md command working on your end?

Regards

Jingyang, Teh

[binupr]

Hi Jingyang,

Yes md command is working for us.

Thanks for the recommendation.

Regards

Binu

[JingyangTeh_Altera]

Hi

Since this thread been resolve, I shall set this thread to close pending. If you still need further assistance, you are welcome reopen this thread within 20days or open a new thread, some one will be right with you. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

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Regards

Jingyang, Teh