1. The execution resources are shared among two logical processors . Here execution unit comprises of ALU , FPU , Vector Arithmetic units and different modules packed in a processor , each of which can execute independently of the other . If this is the case , the fetch , decode unit for each module is different or same unit is shared among multiple modules in an execution unit ? Because as per my understanding , if one thread is executing Arithmetic operation and the other one executing floating point operation , then the two threads can execute simultaneously . Only when both needs FPU or any execution module , then only one thread stalls . Is my understanding correct ?
2. Can anyone give the power consumption comparision with single core without HT , dual core without HT , single core with HT and Dual core with HT .
3. Mechanism os scheduling with HT enabled :
Consider a situation where 2 threads are pinned to a processor , if the first thread is executing and for some reason it stalls waiting for some resource . During this second thread executes . But what if the resource becomes available to the first thread immedeatly. Will the second thread stop execution and hands over the processor for the first thread or it continues to execute and the first thread will be able to continue its execution only when the second thread completes execution , eventhough resources are available .Can thread priority be set , in a situation where two threads needs the resource at the same time ,to determine which thread gets the resource.
Think "pipeline." On each execution cycle the CPU checks which ops are ready and picks one for that cycle. If more than one instruction is ready, one will be picked arbitrarily and start making its way down the pipeline. A second, ready instruction will have to wait for another cycle to get launched into the pipeline. Then, both instructions are proceeding down the pipeline and will eventually finish. This is a pretty generic description of sequential action and can be complicated by various extra features like Out-Of-Order execution, and HW multiplexing of execution contexts, including the one called Intel Hyper-Threading Technology. In the case of Intel HT, contention might delay a particular instruction by a cycle or two, but eventually both will proceed down the pipeline, each taking advantages of functional units that might otherwise be idle but for the ability to run multiple instruction streams through the same data path. So the mere fact that multiple threads of execution are proceeding through a single collection of hardware should not generally have much of an impact on power consumption.