I have a design and randomly the Nios II is dying.
- There is a system "heartbeat" counter which is an indication the Nios has stopped - when it does stop, it stops at the same time after reset (power on reset or JTAG reprogram) at about 4 minutes +/- 100ms.
-The Nios is dead; when the fail event has happened I can no longer connect to the Nios through JTAG. A reset is needed to reconnect.
- The surrounding FPGA logic is still functioning. Some of the peripherals I can still see functioning and I can view signals through signal tap when the Nios is dead.
-It happens randomly, most "sessions" go without issue.
---- Things I know ---
- It is not power supply related as far as I can tell; it happens both from power on reset and JTAG load reset.
-The clocks and reset to the Nios look normal when its dead ( I can view them in signalTap).
Can anyone recommend other things to explore ?
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Can we know what board are you using? And also the type of USB blaster cable is being used to connect to the board?
Also if convenient, perhaps you can share a screenshot of the design you have for us to better understand the situation.
Hi BB, the information I can give is:
- Arria V
- Quartus 16.1
- Using internal block RAM only for NIOS.
- Just as standard "Altera USB-Blaster" - although probably not too relevant as the failure event happens when connected or not connected !
We have a watchdog in the system, but disabling this has no effect - I also tried forcing an infinite loop to see it the watchdog was causing trouble.
Whatever is killing the NIOS seems to be killing the "jtag debug module" - see attached image "Nios lock"