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8 bit dynamic alignment for SPI device?

Altera_Forum
Honored Contributor II
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Hello! 

 

I've designed controller for NVRAM memory with SPI interface. 

I've create component as memory slave device with 8 bit data bus (I don't want to use  

this as register slave). 

When I write to memory all is OK (address, cs, write signals are correct), but when I was tried to read  

address bus is wrong. 

For example: 

 

unsigned char *p = (unsigned char*) FRAM1_BASE; 

 

int main(void) 

{  

 

p[0] = (unsigned char) 0xDC; 

printf("%02x\n", (unsigned char) p[0]); 

p[1] = (unsigned char) 0xCD; 

printf("%02x\n", (unsigned char) p[1]);  

 

return 0; 

 

I've simuleted it and got next: 

 

When to p[0] or p[1] I write some value it is writing correct, 

but when it is reading - address bus sets to 0, after to 1, after to 2, after to 3 (in both case). 

All this time chipselect is active and read signal too. 

Therefore when I'm reading p[1], there always p[0], because p[0] was read first. 

 

What's wrong? 

Any idea? 

 

Thx.
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10 Replies
Altera_Forum
Honored Contributor II
949 Views

Hi Camelot, 

I think this behaviour is caused by the "memory slave" setting. Infact your peripheral is 8 bit wide and, in order to read a 32 bit word, the Avalon bus has to do 4 reading from your peripheral.  

How many registers has your peripheral and what's address span?
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Altera_Forum
Honored Contributor II
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My SPI memory has 65536 8-bits cells and has a span from 0x01010000 to 0x0101FFFF.  

In my core I'm reading 16-bits address and 8-bits data from avalon bus and write these values by spi interface to memory. The reading is doing similarly (reading address). 

All this time when data writing or reading signal chipselect, write or read is keeping on Avalon bus fixed time.
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Altera_Forum
Honored Contributor II
949 Views

<div class='quotetop'>QUOTE </div> 

--- Quote Start ---  

When to p[0] or p[1] I write some value it is writing correct,[/b] 

--- Quote End ---  

 

What do you mean? What address signals can u see when writing p[0] and p[1]?
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Altera_Forum
Honored Contributor II
949 Views

When I write to p[0] address is 0, when I write to p[1] address is 1.

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Altera_Forum
Honored Contributor II
949 Views

Ok, 

I think you have to use "register slave" setting for your component: in this case you will have 0x40000 address span, but you will access a single byte cell when reading.
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Altera_Forum
Honored Contributor II
949 Views

Thanks for replay http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif  

Point is that I want to lighten the work of a programmer and a complexity of programm. 

Nevertheless, maybe the solution is near here?
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Altera_Forum
Honored Contributor II
949 Views

For reading, have you tried "IORD_8DIRECT(FRAM1_BASE,0)" for p[0] and "IORD_8DIRECT(FRAM1_BASE,1)" for p[1]?

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Altera_Forum
Honored Contributor II
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Are you read my mind ? http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif I&#39;m trying it write now http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif

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Altera_Forum
Honored Contributor II
949 Views

But all the same http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/sad.gif

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Altera_Forum
Honored Contributor II
949 Views

Yes, 

I have this skill http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/laugh.gif
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