A debug problem!

Altera_Forum · ‎01-09-2006

I had buid a system in SOPC Builder 5.0 with NIOS II/F, JTAG level 3, 16KBytes onchip_rom, 1KBytes exchange_ram, jtag_uart.

In NIOS IDE, I compiled a sample project hello_world_simple, this project could run properly on target hardware, how ever, if I debug this project, the console shows :

Using cable "ByteBlasterII [LPT1]", device 1, instance 0x00

Processor is already paused

Listening on port 2874 for connection from GDB: 59s58s57s56s55s54

saccepted

Connection from GDB closed

Leaving target processor paused;

I'm using cyclone epIC12Q240C8, with 80 MHz clock and Byteblaster II.

btw,when i debug the ISS ,it shows :

Error! : The ELF file Debug/hello_world_0.elf is attempting to load a larger mem

ory block (size = 0x455C) than has been defined for module exchange_ram (size =

0x0400) in the ptf file

Fatal Error! : Memory map is not consistent with memory image file - check that

file 'Debug/hello_world_0.elf' is compiled and linked for system 'D:\RESET_SOPC_

PCI3\Hard_Emulator.ptf'

could anybody help me!?

with my regards!

Altera_Forum · ‎01-09-2006

It seems to be that you're trying to put into your RAM a block of code/data which is bigger than it's size.

Besides this, with a -C8 speed grade chip, can you run a NIOS-II at 80MHz? Doesn't your Quartus give warnings about not meeting your timing assignments? We use an EP1C12, 324pins, -C8, NIOS-II, near 89% resources usage (lots of things in hardware) and our highest speed is about 70MHz.

Altera_Forum · ‎01-11-2006

i add a PLL to improve the clock !the input is 25M