Avalon and 8-bit CFI

Nios® V/II Embedded Design Suite (EDS)

Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++

Avalon and 8-bit CFI

1,045 Views

Hi Al,

I know I discussed this once before with wentao ... but I'd like to confirm ... since I seem to be

having one of those "senior moments" ;-):

http://forum.niosforum.com/forum/index.php...t=1130&hl=jffs2 (http://forum.niosforum.com/forum/index.php?act=st&f=18&t=1130&hl=jffs2)

Using the toggle bit (DQ6) to test for flash erase/write operation in progress won't work with the avalon

bus because the avalon bus performs 4 consecutive reads of an 8-bit device, correct?

i.e. -- for a single 8-bit CPU read, the avalon bus does 4 external bus cycles, and DQ6 does the

following: 1 -> 0 -> 1 -> 0 ... and the subsequent CPU read will never see DQ6 change state.

So, data polling via DQ7 is the way to go ... do I have this right?

Regards,

--Scott

Link Copied

0 Replies

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.