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Boot problem : change exception address

Altera_Forum
Honored Contributor II
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Hello 

 

I have some problem with NIOS software. 

I made a boot loader using on chip memory. Reset and application code are set in on-chip memory. 

Application is downloaded in SDRAM and when the transfert is done, there is a jump to the start address of my application. 

If I use a programm without interrupt, there is no problem.  

Whereas, when I want to use a programm using interrupt, I have some problem. 

First my binary file is too big, more than 32 MB. To generate my binary, i Use the following commands : 

 

[SOPC Builder]$ nios2-elf-objcopy -R.entry -O binary hello_world_0.elf test_oot_v7.bin 

 

I try to modify the exception , in the linker script, I remplace  

 

PROVIDE (__ram_exceptions_start = ABSOLUTE(.)); 

. = ALIGN(0x20); 

 

by 

 

PROVIDE (__ram_exceptions_start = 0x02007020); 

. = ALIGN(0x20); 

*(.irq) 

 

and I generate my binary as follow 

 

 

[SOPC Builder]$ nios2-elf-objcopy -R.entry -O binary --change-section-lma .exce 

ptions=0x02008020 hello_world_0.elf test_boot_v7.bin 

 

So my binary file is smaller, but when I load this application on Sdram, after booting, the interrupts are not treated. 

I suppose that my change is not affective. 

 

How can I do to change exceptions address? 

Thanks for all.
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Altera_Forum
Honored Contributor II
510 Views

Hi, 

 

I have a very similar problem as well. My configuration is the following: 

- Single NiosII processor 

- Small on-chip memory that contains a bootloader (that reads the main program from an SD card and copies that to DDR memory) 

- DMA controller 

- Another small on-chip memory for DMA to use 

- 128Mb DDR memory 

 

The NiosII processor is configured to reset from the on-chip memory and that works perfectly, interrupts and all. It even successfully loads the main program to the DDR memory and then jumps there. However interrupts do NOT work anymore. I believe I should somehow copy/reconfigure the exception vector from the main program to the nios processor, or have the processor move its exception vector to point to the proper location in the DDR memory, but how? 

 

Any help would be much appreciated 

 

- Teemu
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Altera_Forum
Honored Contributor II
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Seems I managed to solve the issue. 

 

Since I have two separate nios-projects, and they both generate their own .hex files, I simply needed to convert the other .hex (one that was not built into the fpga config) to bin. Then include that on the SD card and once I started the second program, just copy and overwrite the previous contents of the on-chip memory. Works like a charm! 

 

Hope this helps someone
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