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Synaptic Labs has a Hyperflash controller using a reference project they provided with a soft processor (NIOSII). A customer needs to move this IP from the NIOSII to a hard processor.
According to the vendor (Synaptic Labs) all my customer needs to do is copy their folder from under their IP directory to my customer's project's IP directory, and the cores will show up in Qsys/Platform Designer. This was not found to be the case.
How can I help this customer add this 3rd party IP block into their design?
The customer also tried adding the _hw.tcl files using the add function. For some reason Qsys/Platform Design does not like the fact the Synaptic Labs _hw.tcl has callback functions.
Does anyone have any suggestions on what callback functions are causing this error?
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Hi,
Do you mean using the ALTERA soft IP outside the FPGA fabrics?
Regrads.

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