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Hi all
I need some hint:
We are using Cypress/Infineon S25FL128 as configuration flash for Intel Cyclone V FPGA. I use Quartus 17.0 Lite.
I created a simple Flash Programmer Project using "Nios® II Flash Programmer User Guide" with the changes according to "AN98558 In-System Programming for Cypress SPI Flash on Altera® FPGA Board" in Quartus 17.0 in order to access custom flash and successfully established connection with the Nios II and Flash. Here is an output of:
nios2-flash-programmer --epcs --base 0x120000 --debug --override nios2-flash-override.txt
Reading override file "nios2-flash-override.txt" Using cable "USB-Blaster [USB-0]", device 1, instance 0x00 Resetting and pausing target processor: OK Processor data bus width is 32 bits Looking for EPCS registers at address 0x00120000 (with 32bit alignment) Initial values: 0001703A 04C00074 9801483A 9CFFF804 983FFD1E 0000203A Not here: reserved fields are non-zero Looking for EPCS registers at address 0x00120100 (with 32bit alignment) Initial values: 93000237 6300080C 603FFD26 90000335 A8000C26 03010004 Not here: reserved fields are non-zero Looking for EPCS registers at address 0x00120200 (with 32bit alignment) Initial values: 02C02004 002EE03A 00000F06 90000335 4000683A 0017883A Not here: reserved fields are non-zero Looking for EPCS registers at address 0x00120300 (with 32bit alignment) Initial values: 3180080C 300C96BA 701CD07A 719CB03A 843FFFC4 803FF81E Not here: reserved fields are non-zero Looking for EPCS registers at address 0x00120400 (with 32bit alignment) Initial values: 00000000 00000000 00000260 00000000 00000000 00000001 Valid registers found EPCS signature is 0x01 EPCS identifier is 0x016018 Using EPCS size information from section [EPCS-016018] Device size is 16MByte (128Mbit) Erase regions are: offset 0: 256 x 64K EPCS status is 0x04 Leaving target processor paused
I also have my working SOF Bitstream, which I want to program. The SOF works absolutely fine if I program the FPGA directly with it using Quartus Programmer. But if I use
sof2flash --epcs
to create a .flash file and then program it into the flash using
nios2-flash-programmer --epcs --base=0x120000 --override=nios2-flash-override.txt <file>
The programming succeeds:
001A0000 (96): Programming Programmed 1686KB +42KB in 17.0s (101.6KB/s) Did not attempt to verify device contents
but FPGA does not boot up after power cycling. The funny thing is that I have an opportunity to program the S25FL128 using some old working image(unfortunately I have no access to the source code, so no Idea how it works) and after that FPGA boots up from the flash just fine. And if I read the flash contents using
nios2-flash-programmer --epcs --base=0x120000 --read --read-bytes=0,0x200000 --override=nios2-flash-override.txt <file>
the resulting file slightly differs from the one I've created with sof2flash utility. But if I flash this file back using above command, it works also. (offcourse I ensured that the flash was corrupted before).
So the problem is definitely somewhere in generated .flash file. I have compared two files a little and found that:
- The first lines in read file are:
S1230000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFC S1230020FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFDC S1230040FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFBC S1230060FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF9C S1230080565656566C2FFFFFEC5FFFFF6F2FFFFFEC8FFFFF6D4FFFFFEE0FFFFFCD9FFFFFEE S12300A05D1FFFFF980FFFFF5C0FFFFF9C6FFFFF5CAFFFFF9A1FFFFF1A1FFFFF182FFFFF6F S12300C03D6FFFFF9E0FFFFFBA2FFFFF3E2FFFFFFE2FFFFFBC4FFFFF798FFFFF194FFFFFD5 S12300E03C8FFFFF3C2FFFFF3AAFFFFF980FFFFFBA0FFFFF994FFFFF994FFFFFB90FFFFFE5 S12301009A8FFFFFB8EFFFFF1AEFFFFFD0CFFFFF38AFFFFF1B2FFFFF342FFFFF788FFFFFD8 S1230120568FFFFF00003B9CFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF19
while in generated by sof2flash they are:
S32500000000000000008379737854541A00FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF45 S32500000020FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFDA S32500000040FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFBA S32500000060FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF9A S32500000080F565656566C2FFFFFEC5FFFFF6F2FFFFFEC8FFFFF6D4FFFFFEE0FFFFFCD9FFFF2E S325000000A0F5D1FFFFF980FFFFF5C0FFFFF9C6FFFFF5CAFFFFF9A1FFFFF1A1FFFFF182FFFF39 S325000000C0F3D6FFFFF9E0FFFFFBA2FFFFF3E2FFFFFFE2FFFFFBC4FFFFF798FFFFF194FFFF62 S325000000E0F3C8FFFFF3C2FFFFF3AAFFFFF980FFFFFBA0FFFFF994FFFFF994FFFFFB90FFFF44 S32500000100F9A8FFFFFB8EFFFFF1AEFFFFFD0CFFFFF38AFFFFF1B2FFFFF342FFFFF788FFFF43 S32500000120F568FFFFF00003B9CFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFA
The differences for me are:
- the first line is not all 0xFFs
- the contents of generated file are shifted by one byte.
- there are few other bytes are different in whole bitstream, but rest is identical.
I tried to use sof2flash in all kind of ways and with --epcq options, also tried to convert rbf file, but I always run into the issue that generated .flash file is not exactly same as working one and generated file never works.
Could someone help me investigate the issue? Unfortunately I could'nt find any answer by googling.
Thanks
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I've actually found the problem.
The issue was that sof2flash utility could not generate proper srec file. Either the little-endian format was wrong or there were wrong bytes in header area.
To resolve this issue I used a third party utility https://sourceforge.net/projects/srecord/ to convert .rbf file into .flash
The command line for this is
srec_cat file.rbf -Binary −Bit_Reverse -Output=file.flash
-Binary option specifies that input file has binary format
and
- Bit_Reverse option specifies reversing bits in output file.
With this command a proper .flash file can be generated, which then can be programmed using nios2-flash-programmer or quartus_pgm into Flash.
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Hi
Could you try the override file with the following settings?
[EPCS-012019] # Cypress SPI Flash S25FL128S
sector_size = 65536
sector_count = 128
I see that the logs indicate a the erase sector size is 256 x 64K where as the S25FL128S should be 128 x 64K.
Regards
Jingyang, Teh
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Hi Jingyang
My nios2-flash-override.txt looks as follows:
[EPCS-016018] # Infineon SPI Flash S25FL128
sector_size = 65536
sector_count = 256
Sorry if I didn't mentioned before, but I'm using S25FL128L, not S25FL128S. In datasheet for S25FL128L it says it has 256 blocks of 64KB, which perfectly matches 128Mbit total capacity.
I had to use 016018 as these match with the ID data, provided in the S25FL128L datasheet. As you can see in my first post it works.
Do you think I still need to change override file to 128 x 64K?
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Hi
Could you try out the values as suggested from the document?
Regards
Jingyang, Teh
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Hi
It seems like it is more of the override file that is having the problem.
It is best to consult Cypress on the changes required for the override file.
Regards
Jingyang, Teh
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Hi
Do you have any other question regarding this issue?
Regards
Jingyang, Teh
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I've actually found the problem.
The issue was that sof2flash utility could not generate proper srec file. Either the little-endian format was wrong or there were wrong bytes in header area.
To resolve this issue I used a third party utility https://sourceforge.net/projects/srecord/ to convert .rbf file into .flash
The command line for this is
srec_cat file.rbf -Binary −Bit_Reverse -Output=file.flash
-Binary option specifies that input file has binary format
and
- Bit_Reverse option specifies reversing bits in output file.
With this command a proper .flash file can be generated, which then can be programmed using nios2-flash-programmer or quartus_pgm into Flash.
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Hi
I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
Regards
Jingyang, Teh
