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DDR3 "verify fail" when applying little modifications in Qsys

Altera_Forum
Honored Contributor II
917 Views

Hi , 

 

I have designed a NIOS II-e based system running on DDR3 memory and the system works fine but when I do small modifications in QSys (eg. add an interval timer) in some cases I face "verify failed" when programming NIOS2. 

 

My platform is Stratix IV Development Kit. NIOS II processor is connected to DDR3 controller reset and clock(afi_half_clock: 75Mhz).  

 

Thanks in advance
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Altera_Forum
Honored Contributor II
259 Views

I'm having the same problem with DE4 board when using DDR2 memory for instrucion of NIOS. Could you solve the problem?

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